The present invention relates to a device for processing an optical signal. The device is particularly adapted to making a decision circuit in the field of very high data rate optical signal transmission.
It is becoming and more important to have very high data rate transmission networks in order to satisfy the growing needs for services associated with data transmission. Optical fiber with its large passband is the preferred medium for long distance transmission.
Typically, an optical signal is in the form of a carrier wave which is modulated between two states: a high state or logic “1”, and a low state or logic “0”; modulation being performed at a clock frequency which defines the data rate. The time allowed for containing one bit, i.e. the bit time, is thus the clock period.
At present, transmission systems can be made having data rates of 40 gigabits per second (Gbit/s) using time division multiplexing (TDM). Optical transmission at several terabits per second (Tbit/s) is then possible by combining wavelength division multiplexing (WDM) with 40 Gbit/s transmission per wavelength.
In order to achieve such performance, very fast circuits are needed; thus it is very important in particular to design decision circuits that operate at rates of 40 Gbit/s and even higher, e.g. up to 80 Gbit/s. An optoelectronic decision circuit serves in particular to convert, with a certain time delay, successive levels of a received modulated optical signal in which it is difficult to say whether the levels corresponding to logic “1” or logic “0”, into a digital electrical signal which is easier to interpret.
The document “An 80-Gb/s optoelectronic delayed flip-flop IC using resonant tunneling diodes and uni-traveling carrier photodiode” (Kimikazu et al., IEEE Journal of Solid State Circuits, Vol. 36, No. 2, February 2001) thus describes a decision circuit capable of operating at a rate of 80 Gbit/s. That decision circuit has two resonant tunnel effect diodes (RTDs) in series and a unipolar photodiode in parallel with one of the two resonant tunnel effect diodes. It is the voltage across the terminals of the photodiode combined with the clock front that enables state to be changed in a stable manner. That circuit enables an input modulated optical signal to be copied with a certain delay, the conversion process taking place on the rising fronts of a clock signal.
Nevertheless, such a circuit poses certain difficulties.
Thus, the phase margin, in other words its ability to accept time shifts between the clock signal and the clock rate of the data signal is a crucial criterion. In the decision circuit described in the document “An 80-Gb/s optoelectronic delayed flip-flop IC using resonant tunneling diodes and uni-traveling carrier photodiode”, the phase margin is necessarily small when operating at high frequency, and thus in particular at data rates of 80 Gbit/s, and it is particularly difficult to obtain clock fronts which occur with a small margin of error at instants when a data signal modulated with a return-to-zero (RZ) type format is readable.